This invention is related generally to solid state integrated circuit fabrication and, more particularly, to methods for fabricating voltage programmable link structures.
Programmable conductive paths, particularly links between two or more distinct conductive layers, are increasingly employed in solid state integrated circuit fabrication to produce a wide variety of programmable circuits including, for example, field programmable gate arrays (FPGAs), programmable read only memories (PROMs), and other programmable electronic devices. Typically, these devices are "programmed" by applying an electrical voltage to trigger an "antifuse" link structure of two conductive layers separated by an insulator. An electrical connection is established between the conductive layers by breaking down the insulator at selected regions with a current developed by the programming voltage.
One way to implement an antifuse voltage programmable link structure is to use two levels of flat metallization agents and a composite insulator made of a deposited silicon oxide film interposed between two like films of silicon nitride. The insulator films are typically each about 100 .ANG. (10 nm) thick and require programming voltage of about 12 volts utilizing a 1 ms pulse. The normal operating voltage for this voltage programmable link structure without affecting the integrity of the unprogrammed links is about 5 volts. Such a link structure is presented in prior application, PCT/US92/06138, filed Jul. 22, 1992.